Mentor Graphics PCB Design Tools

Saturday, June 30, 2012

PADS Layering Scheme

LAYER USAGE

1-18 Trace & Plane Layers (Copper Layers)

19 Targets, Gerber Data Title block, .004” Board Outline

20 Component Placement Courtyards (outline)

21 Solder Mask Top

22 Paste Mask Bottom

23 Paste Mask Top

24 Drill Drawing

25 Plane Layer Clearances, Thermal Relief’s, .100” Board

Outline, Common Split Planes & Common Plane Voids

26 Silkscreen Top

27 Assembly Drawing Top

28 Solder Mask Bottom

29 Silkscreen Bottom

30 Assembly Drawing Bottom

Thursday, June 28, 2012

Standard NAMING CONVENTION

FILENAME Example: XXXXXATS.PHO

Break Down of the above filename: XXXXX= Job Name : 5 Digits

A = Revision : 1 Digit

TS = Top Silk : (See Suffix)

.PHO = Photoplot : (See Gerber Files)

PADS Database Description

_________A.PCB PADS Database (Binary File)

Netcheck Files Description

_________A1.ECO PADS Format Engineering Changes created by NetCheck Tools (ASCII File)

_________A.RPT Detailed Report illustrating the differences between OrCAD & PADS Netlists

Assembly Data Description

_________A.ASC PADS Format ASCII File of full database created by File/Export/ASCII

_________AXYE.ASC PADS Part Placement Coordinate List created by File/Export/ASCII, English

_________AXYM.ASC PADS Part Placement Coordinate List created by File/Export/ASCII, Metric

README_ASSY.TXT Naming Convention Explanation File for Manufacturer

PADS Reports Description

_________ANET.TXT PADS Netlist created by File/Report/PowerPCB Format

Netlist, Includes Part List

_________ANETX.TXT PADS Format Netlist created by File/Report/Netlist w/o pin

info, No Part List

_________ABOM.TXT PADS Format Part List created by File/Report/Part List 2

_________ANON.TXT PADS Format Unconnected Pins Report created by

File/Report/Unconnected Pins

_________ASTA.TXT PADS Format Statistics report created by

File/Report/Statistics

_________A.TST PADS Format Test Point Report created by

File/Report/DFT Test Point Audit

_________ACAM.NET CAM356A Format Netlist

Gerber Files Description

_________A.REP PADS Gerber Aperture Report (ASCII File)

_________AL1.PHO PADS Gerber Data for LAYER 1 (Top Side) (ASCII File)

*Note: There is a .PHO file for every layer of the PCB design. IE: L1, L2, L3, L4 = a four layer board.

_________AST.PHO PADS Gerber Data for SILKSCREEN (Top Side)

(ASCII File)

_________ASB.PHO PADS Gerber Data for SILKSCREEN (Bottom Side)

(ASCII File)

_________AMT.PHO PADS Gerber Data for SOLDER MASK (Top Side)

(ASCII File)

_________AMB.PHO PADS Gerber Data for SOLDER MASK (Bottom Side)

(ASCII File)

_________APT.PHO PADS Gerber Data for PASTE MASK (Top Side)

(ASCII File)

_________APB.PHO PADS Gerber Data for PASTE MASK (Bottom Side)

(ASCII File)

_________ADD.PHO PADS Gerber Data for DRILL DRAWING (ASCII File)

README_FAB.TXT Naming Convention explanation file for manufacturer

Drill Data Description

_________ANC.DRL Numeric Control Drill Report in Exlon Format

_________ANC.LST Numeric Control Drill Report in True-Drill Format

_________ANC.REP Numeric Control Drill Size and Quantity Report

PADS CAM File Description

_________A.CAM PADS Format Post Processing File (ASCII File)

Autoroute Files Description

_________A.DO CCT Autorouter Command File (ASCII File)

_________A.STS CCT Autorouter Statistics Report (ASCII File)

_________A.NON CCT Autorouter Unconnected Pins Report

_________A.WIR CCT Autorouter Wires file with Unmitered Traces

_________A.RTE CCT Autorouter Wires file with Mitered Traces

_________A.ATO CCT Autorouter AutoSave File. Backup file saved after

every route interation

_________A.DSN CCT Autorouter Temp File created during the translation

from PADS to CCT

_________A.DID CCT Autorouter Report on what the router did

_________A.SPI CCT Autorouter temporary translation file

_________A_SP.PCB CCT Autorouter PADS output file name

PADS HPGL File Description

_________ADD.PE1 Pen Plot of Drill Drawing

(HPGL = Hewlett Packard Graphic Language)

_________AAT.PE1 Pen Plot of Top Assembly Drawing (HPGL Data)

_________AAB.PE1 Pen Plot of Bottom Assembly Drawing (HPGL Data)

AutoCAD Files Description

_________ADD.DXF Drill Drawing produced by translating a .PE1 file using

HP2DXF software

_________AAT.DXF Top Assembly Drawing produced by translating a .PE1

file using HP2DXF

_________AAB.DXF Bottom Assembly Drawing produced by translating a .PE1

file using HP2DXF

DD.DWG Temporary Drill Template to be inserted into an

ANSI “B-Size” Format Drawing

AT.DWG Temporary Top Assembly to be inserted into an

ANSI “B-Size” Format Drawing

AB.DWG Temporary Bottom Assembly to be inserted into an

ANSI “B-Size” Format Dwg.

_________AD1.DWG Drill Drawing Page 1 Contains Fabrication Notes,

Lay-up Detail & Drill Chart

_________AD2.DWG Drill Drawing Page 2 Contains the Dimensioned Board

Outline and Drill Symbols

_________AAT.DWG Top Assembly Drawing on ANSI “B-Size” Sheet 1 Format

_________AAB.DWG Bottom Assembly Drawing on ANSI “B-Size”

Sheet 2 Format

_________AD1.PLT Drill Drawing Page 1 HPGL Data

(HPGL = Hewlett Packard Graphic Language)

_________AD2.PLT Drill Drawing Page 2 HPGL Data

(D1 & D2 go with the Fabrication Data)

_________AD1.PDF Drill Drawing Page 1 PDF Data (ADOBE Acrobat File)

_________AD2.PDF Drill Drawing Page 2 PDF Data (ADOBE Acrobat File)

Tuesday, June 26, 2012

Standard REFERENCE DESIGNATORS

A Assembly

AR Amplifier

AT Attenuator; Isolator

B Blower

BR Bridge Rectifier

BT Battery

C Capacitor

CB Circuit Breaker

CN Capacitor Network

CP Coupler

CR Diode or Silicon Rectifier

D Diode; Thyristor; Varacter

DC Directional Coupler

DP Duplexer

DL Delay Line

DS Digital Display; LED Lamp

E Miscellaneous Electrical Part

F Fuse

FB Ferrite

FD Fiducial

FL Filter

G Generator

HW Hardware

HY Circulator

I or ICT In Circuit Test Point

J Jack Connector

JP Configuration Jumper

K Relay

L Coil; Inductor

LS Loud Speaker/Buzzer

M Motor

MG Motor-Generator

MH Mounting Hole

MK Microphone

MP Mechanical Part

P Plug Type Connector

PS Power Supply

Q Transistor

R Resistor

RN Resistor Network

RT Thermistor

S Switch

T Transformer

TB Terminal Block

TC Thermocouple

TP Test Point

U Tuner

U Integrated Circuit

V Electron Tube

VR Voltage Regulator

W Cable Transmission

X Sub-circuit

Y Crystal or Oscillator

Z Ref Des Suppressed

Sunday, June 24, 2012

PADS Software Reference Designator Rename List

1. Engineer should specify at the beginning of the design, if the reference designators are to be renamed.

2. Engineer should specify the direction of the rename.

Examples: Top to Bottom, Right to Left

Left to Right, Top to Bottom

3. Engineer should specify any Reference Designators that are not to be renamed.

4. If the engineer is extremely concerned about the flow of the renaming process,

a WAS/IS List should be manually generated by the creation of an ASCII text file.

EXAMPLE:

*PADS-ECO*

*RENPART*

U12 U1

U5 U2

U1 U3

C9 C1

C6 C2

*END*

NOTE:

*PADS-ECO* should be located in the 1^st line of the ASCII text file.

*RENPART* should be located on the 2^nd line.

*END* should be at the end of the file.

Friday, June 22, 2012

PADS Software Netlist Defaults

NOTE: To prevent a designer from editing engineering netlists, please obey the following rules:

1. Reference Designator Names have a 15 character limit.

2. Pin Names have a 7 character limit.

3. Netnames have a 57 character limit.

4. Illegal characters are * < > ? : . ,

Lower case characters are not allowed.

Avoid \ / because Unix systems do not accept these characters.

5. Please use the abbreviation rather than the full name i.e.: use K, not CATHODE.

Use A, not ANODE.

All new library decals with special alpha pin numbers (IE: NO & NC for switches) must be clearly noted on the data sheet that will be used to create the library decal.

2 & 3 pin devices with alphabetical Pin Names are as follows:

DIODES CATHODE = C

ANODE = A

TRANSISTORS BASE = B

EMITTER = E

COLLECTOR = C

POWER FETS SOURCE = S

GATE = G

DRAIN = D

POTENTIOMETERS CW = 1

WIPER = 2

CCW = 3

CAPACITORS & POSITIVE = 1

BATTERIES NEGATIVE = 2

6. PADS format netlist is preferred.

7. Netlist header should be: !PADS-POWERPCB- V4.0-MILS!

*NET*

8. Netlist footer should be: *END*

9. SAMPLE NETLIST: !PADS-POWERPCB- V4.0-MILS!

*NET*

*SIG N00001

U1.1 C1.1 R1.1

*SIG N00002

U1.2 R1.2

*SIG GND

U1.7 C1.2 U2.7 C2.2

*SIG VCC

U1.14 U2.14 C2.1

*END*

10. File name suffix must be .ASC if you are using PowerPCB.

Wednesday, June 20, 2012

PADS Software Decal List Defaults

NOTE: To prevent a designer from editing engineering decal lists, obey the following:

1. Reference Designator Names have a 15 character limit.

2. Decal Names have a 40 character limit.

3. Illegal characters for decal names are * < > ? : . ,

Avoid \ / because Unix systems do not accept these characters.

4. Lower case characters are allowed but pads will convert them to upper case.

5. Decal list must be in PADS format. TANGO format Decal List is not acceptable.

6. Decal list header should be:

!PADS-POWERPCB-V4.0-MILS!

*PART*

7. Netlist footer should be:

*END*

8. SAMPLE DECAL LIST:

!PADS-POWERPCB-V4.0-MILS!

*PART*

U1 SO14

U2 PLCC-52

U4 DIP16

C1 CC1206

Y1 XTAL14

*END*

9. File name suffix default is .ASC in PowerPCB, but .net is acceptable.

10. If a decal is not in the library put “SEE DATA SHEET” in place of the decal name.

Be sure to put the reference designator on the component data sheet, especially if there

is more than one Library part to build.

11. If a new decal has alphabetical pin numbers, be sure that the data sheet clearly

defines the pin numbering assignments.

Example: Transistors with Base, Emitter and Collector.

12. If the Decal List & the Netlist are in the same ASCII file, break them into 2 files.

Always ASCII IN the Decal List first, and trouble shoot and fix the errors.

Then ASCII IN the Netlist.

13. BGA row and column count limit was 45 x 45 pins in Version 3.0.